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Multiplying Digital to Analog Amplifier

Apr 2021- May 2021

Project Description:

An analog design project to design a two stage OTA amplifier that inserts into a multiplying digital to analog converter stage. The MDAC achieves a precise gain of 2 with other strict specifications such as 0.2% gain and settling error and other OTA specifications like 70 dB gain. This project went through DC, AC, noise and transient analysis. This project was designed with a partner.

Responsibilities:

  • Design 2 stage amplifier that hits 70 dB gain, high unity-gain bandwidth, SNR, and other strict specs.

  • Insert 2 stage OTA into MDAC architecture to achieve precise gain of 2 with gain and settling error of 0.2%. 

  • Run DC, AC, noise, and transient simulations to achieve maximum clock frequency of 100 MHz and compare against ideal MDAC.

mdac.PNG

© 2024 by Jeff Cui.

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